Upper-quality verification to power adoption and construct momentum for RISC-V IP
Munich, 3 Would possibly 2022 – Codasip, the chief in processor design automation, has expanded its adoption of formal verification answers for complete and thorough processor trying out with the addition of OneSpin IC verification equipment from Siemens EDA. Codasip has regularly invested closely in processor verification to underpin the corporate’s talent to ship the trade’s very best high quality RISC-V processor IP.
Codasip adopts Siemens’ OneSpin equipment for formal verification
Siemens EDA’s OneSpin equipment supply a complicated and extremely tough verification platform to take on crucial IC integrity problems. The extremely complicated OneSpin formal verification equipment for car and different high-integrity processor programs examine the implementation with minimum arrange and runtime.
The standard of Codasip RISC-V processor IP units it with the exception of competition. With 2 billion cores of Codasip processor IP already in use, most commonly with tier one shoppers, it is very important that Codasip continues to supply processor IP this is persistently of the best quality.
Neil Hand, technique director for the IC Design Verification department of Siemens EDA, “We’re happy to collaborate with Codasip to assist make sure that the top quality in their RISC-V Processor IP, in addition to to ascertain optimized answers for our mutual shoppers. The sector-class generation of our OneSpin formal verification equipment together with the OneSpin RISC-V verification resolution, along side Codasip’s leading edge RISC-V IP, is essential for IC designers to ship top of the range merchandise to marketplace temporarily.”
Rupert Baines, CMO, Codasip, commented, “The deficient verification of a few RISC-V IP is frankly surprising. Builders have legit issues concerning the high quality of RISC-V IP that’s maintaining again its adoption. Upper high quality and officially confirmed RISC-V IP will assist it to move the chasm and vastly build up its adoption.”
Codasip’s Director of Verification, Philippe Luc, added, “We’re very happy with our personal rigorous option to verification with a powerful in-house verification group – our personal extraordinarily thorough inside trying out methodologies, mix with best-in-class third-party equipment. As a part of this, we’re thrilled to make use of OneSpin generation from Siemens EDA, which is a key spouse for Codasip – we stay up for a better and productive dating.”
Codasip makes use of Siemens EDA (previously Mentor Graphics) as its number one EDA software drift.
Codasip is presenting on its reviews with the OneSpin software at Siemens EDA User2User2022 convention at Santa Clara on Would possibly 4th and in Munich on Would possibly twelfth.
About Codasip
Codasip delivers modern RISC-V processor IP and high-level processor design equipment, offering IC designers with all of the benefits of the RISC-V open ISA, in conjunction with the original talent to customise the processor IP. As a founding member of RISC-V World and a long-term provider of LLVM and GNU-based processor answers, Codasip is dedicated to open requirements for embedded and alertness processors. Shaped in 2014 and headquartered in Munich, Germany, Codasip lately has R&D facilities in Europe and gross sales representatives international. For more info about our services and products, consult with www.codasip.com. For more info about RISC-V, consult with www.riscv.org.
Media Contacts
David Marsden
PR & Communications International
david.marsden@codasip.com
+44 7968 407739
Observe: An inventory of related Siemens emblems can also be discovered right here: https://www.plm.automation.siemens.com/world/en/prison/emblems.html.
